1. Field of Invention
The present invention relates to the design and manufacture of an integrated circuit (IC), and particularly to a method for making a photomask layout.
2. Description of Related Art
As the level of integration of integrated circuits is getting increased, the demand for increasing the feature density or reducing the pitch size becomes the mainstream in the semiconductor industry, and the key technology is in photolithography.
However, when the pitch size is beyond the photolithography resolution, a single exposure step is no longer applicable due to the pitch constraint. The pattern decomposition (or called “pattern split”) technique is accordingly developed to meet the process requirements. After the target pattern is decomposed into two patterns respectively defined on two photomasks, the 2P2E (photo-etch-photo-etch) approach utilizing two exposure steps and two etching steps is implemented. However, the pattern decomposition may result in the alignment error between the exposure steps. Therefore, attention is drawn to how to improve the overlay window for the decomposed patterns.